RISC-V is an open source effort to standardize processor ISA across industry and academia.
I have been recently exploring where the Computer Architecture domain is headed. One very exciting arena of development is “Open Source Hardware” movement. The idea is to leverage the boom sparked by Open Source into the relatively closed development of hardware systems. RISC-V is one such open sourcing effort.
RISC-V focuses mainly on specifying formal specification of the ISA (Instruction Set Architecture), leaving the specific implementations (microarchtecture) to the user. Naturally, these specifications are supported by hardware and software tools including:
- Simulators
- Toolchain
- LibC implementations
- OS ports (Linux, FreeRTOS, OpenBSD to name a few)
- Test frameworks
- Hardware generation backends (Chisel)
To get started with RISC-V, I am following these extremely slides from a tutorial from HPCA 2015.
Note: This is a work in progress and I will be updating this post as I make headway exploring this exciting area.
Toolchain and Simulator for RISC-V – the basics
The tutorial outlines the following commands for this step:
git clone https://github.com/riscv/riscv-tools
cd riscv-tools
git submodule update --init --recursive
export RISCV=<installation path>
export PATH=${PATH}:${RISCV}/bin
./build.sh
This is completes successfully with a toolchain, LibC headers and libraries placed in the installation directory. Now let us try cross compiling an application and running on the Spike simulator:
# Write the code for a small hello world C application.
cat > hello.c <<'EOF'
#include <stdio.h>
int main(void) {
printf("Hello World\n");
return 0;
}
EOF
# Compile the code
riscv64-unknown-elf-gcc -O2 -o hello hello.c
# Run the executable
spike pk hello
# Voila!
Alternatively, we can also try the LLVM compiler. LLVM and clang frontend building completes successfully. However, I have not yet managed to generate an executable.
# Build LLVM toolchain
mkdir build
cd build
${SRCDIR}/riscv-tools/riscv-llvm/configure \
--prefix=$RISCV --enable-optimized --enable-targets=riscv
make && make install
# This step fails with an error in the compiler itself.
# Maybe an error in the RISC-V target specific code?
clang -target riscv -O2 -S \
-isystem ${RISCV}/riscv64-unknown-elf/include hello.c
Currently, I have a GCC based toolchain and the Spike simulator in place to write and test RISC-V based baremetal applications.
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